Shortage Jobs - Senior Verification Engineer - Uvm / Systemverilog / Python / Perl / Bash / Tcl

Senior Verification Engineer - Uvm / Systemverilog / Python / Perl / Bash / Tcl - European Recruitment

Date Posted: Apr 27, 2026

Job Detail

Location:

Pontevedra, Pontevedra, Spain
Company:

European Recruitment
Type:
Shift:
Career Level:
Positions:
Experience:
Gender:

No Preference
Degree:
Apply Before:

May 27, 2026

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Job Description

Verification Engineer - UVM / SystemVerilog / Python / Perl / Bash / TCL Are you a Mid to Senior level Senior Verification Engineer looking for you next challenge?Have experience with SystemVerilog and UVM, plus scripting in Python, Perl, Bash, or TCL?Want to join a very exciting Spain based semiconductor company? If you can say to this, then please keep reading. We're partnered with a genuinely exciting Barcelona HQ'd semiconductor organization and they're seeking a number of Mid-to-Senior Ver…